The present invention relates to a computer architecture and in particular to an architecture that may recover from faults or errors during the execution of program instructions, for example from speculative execution, and having reduced circuit complexity.
The effective execution speed of computer processors may be increased by “speculative execution” in which computer instructions are executed before the data necessary for that execution is available. An example of speculative execution is branch prediction. In branch prediction, the processor predicts which path of a program branch to take before the data necessary to resolve the branch direction has been fetched or computed. Other types of speculation include value prediction (predicting the value of a variable used by an arithmetic operation before it has been fetched or computed) and load-store dependence prediction (predicting that a variable value will not change from the execution of earlier instructions).
Provided that the prediction inherent in speculative execution is reasonably accurate, idle time of the processor is reduced, and an increased instruction execution rate obtained. Speculation is particularly useful in pipeline architectures which largely require that later instructions be inserted into the pipeline before earlier instructions have exited, even though the later instructions depend on the earlier instructions.
In the event that the speculation is in error (mis-speculation), the speculatively executed instructions must be undone or “squashed” and the execution “recovered”. This process is done by returning the processor to the same state it had before execution of the speculative instructions so that the correct instructions can be executed. This squashing process is facilitated by buffering all stores or writes performed by the speculatively executed instructions (which may then be erased in the event of mis-speculation) and flushing the mis-speculated executions from the pipeline. The squashing process relies upon a “checkpoint” created at the beginning of the speculation which accurately records state of the processor in terms of its registers, load store queue, rename table, etc. so that in the event of mis-speculation the speculatively executed instructions may be re-executed as if for the first time.
The circuitry necessary to create and maintain these checkpoints at points of speculation is complex and consumes substantial energy. Some processors having a large number of cores, such as graphic processor units, do not employ speculation at all because of the circuitry overhead.